MIPI 屏
- 配置PAD为MIPI模式：
# vi infinity2m-ssc011a-s01a-padmux-display_for_mipi.dtsi
/*
* infinity2m-ssc011a-s01a-padmux-display_for_mipi.dtsi- Sigmastar
*
* Copyright (c) [2019~2020] SigmaStar Technology.
*
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License version 2 for more details.
*
*/
#include <../../../../drivers/sstar/include/infinity2m/padmux.h>
#include <../../../../drivers/sstar/include/mdrv_puse.h>
/ {
soc {
padmux {
compatible = "sstar-padmux";
schematic =
//<PAD_GPIO0 >,
<PAD_GPIO1 PINMUX_FOR_GPIO_MODE MDRV_PUSE_I2C1_DEV_RESET >,
<PAD_GPIO2 PINMUX_FOR_I2C1_MODE_1 MDRV_PUSE_I2C1_SCL >,
<PAD_GPIO3 PINMUX_FOR_I2C1_MODE_1 MDRV_PUSE_I2C1_SDA >,
<PAD_GPIO4 PINMUX_FOR_PWM0_MODE_3 MDRV_PUSE_PWM0 >,
<PAD_GPIO5 PINMUX_FOR_PWM1_MODE_4 MDRV_PUSE_PWM1 >,
<PAD_GPIO6 PINMUX_FOR_EJ_MODE_3 MDRV_PUSE_EJ_TDO >,
<PAD_GPIO7 PINMUX_FOR_EJ_MODE_3 MDRV_PUSE_EJ_TDI >,
//<PAD_GPIO8 >,
//<PAD_GPIO9 >,
//<PAD_GPIO10 >,
<PAD_GPIO11 PINMUX_FOR_GPIO_MODE MDRV_PUSE_I2CSW_SCL>,
<PAD_GPIO12 PINMUX_FOR_GPIO_MODE MDRV_PUSE_I2CSW_SDA>,
<PAD_GPIO13 PINMUX_FOR_GPIO_MODE MDRV_PUSE_I2C1_DEV_IRQ >,
//<PAD_GPIO14 >,
//<PAD_FUART_RX >,
//<PAD_FUART_TX PINMUX_FOR_GPIO_MODE MDRV_PUSE_UTMI_POWER>,
<PAD_FUART_CTS PINMUX_FOR_GPIO_MODE MDRV_PUSE_CPUFREQ_VID0>,
<PAD_FUART_RTS PINMUX_FOR_GPIO_MODE MDRV_PUSE_CPUFREQ_VID1>,
//<PAD_TTL0 PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_PWR >,
<PAD_TTL6 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_P_CH0 >,
<PAD_TTL7 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_N_CH0>,
<PAD_TTL8 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_P_CH1>,
<PAD_TTL9 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_N_CH1 >,
<PAD_TTL10 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_P_CH2 >,
<PAD_TTL11 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_N_CH2 >,
<PAD_TTL12 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_P_CH3 >,
<PAD_TTL13 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_N_CH3 >,
<PAD_TTL14 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_P_CH4 >,
<PAD_TTL15 PINMUX_FOR_TX_MIPI_MODE_1 MDRV_PUSE_TX_MIPI_N_CH4 >,
<PAD_UART0_RX PINMUX_FOR_UART0_MODE_1 MDRV_PUSE_UART0_RX >,
<PAD_UART0_TX PINMUX_FOR_UART0_MODE_1 MDRV_PUSE_UART0_TX >,
//<PAD_UART1_RX >,
//<PAD_UART1_TX >,
//<PAD_SD_CLK PINMUX_FOR_I2S_MODE_3 MDRV_PUSE_I2S_BCK >,
<PAD_SD_CLK PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_CLK >,
//<PAD_SD_CMD PINMUX_FOR_I2S_MODE_3 MDRV_PUSE_I2S_SDI >,
<PAD_SD_CMD PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_CMD >,
//<PAD_SD_D0 PINMUX_FOR_I2S_MODE_3 MDRV_PUSE_I2S_WCK >,
<PAD_SD_D0 PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_D0 >,
<PAD_SD_D1 PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_D1>,
<PAD_SD_D2 PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_D2>,
//<PAD_SD_D3 PINMUX_FOR_I2S_MODE_3 MDRV_PUSE_I2S_SDO >,
<PAD_SD_D3 PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_D3>,
<PAD_PM_SD_CDZ PINMUX_FOR_SDIO_MODE_1 MDRV_PUSE_SDIO0_CDZ>,
<PAD_PM_IRIN PINMUX_FOR_PM_IRIN_MODE MDRV_PUSE_IR>, // IR: default non-GPIO
//<PAD_PM_SPI_CZ >, // default not-GPIO
//<PAD_PM_SPI_CK >, // default not-GPIO
//<PAD_PM_SPI_DI >, // default not-GPIO
//<PAD_PM_SPI_DO >, // default not-GPIO
//<PAD_PM_SPI_WPZ >, // default not-GPIO
//<PAD_PM_SPI_HLD >, // default not-GPIO
//<PAD_PM_LED0 >,
//<PAD_PM_LED1 >,
<PAD_SAR_GPIO0 PINMUX_FOR_SAR_MODE MDRV_PUSE_SAR_GPIO0 >, // sar: default not-GPIO,
//<PAD_SAR_GPIO1 >, // sar: default not-GPIO
//<PAD_SAR_GPIO2 >, // sar: default not-GPIO
//<PAD_ETH_RN >, // ETH: default not-GPIO
//<PAD_ETH_RP >, // ETH: default not-GPIO
//<PAD_ETH_TN >, // ETH: default not-GPIO
//<PAD_ETH_TP >, // ETH: default not-GPIO
<PAD_DM_P1 PINMUX_FOR_USB_MODE MDRV_PUSE_UTMI1_DM >, // utmi: default not-GPIO
<PAD_DP_P1 PINMUX_FOR_USB_MODE MDRV_PUSE_UTMI1_DP >, // utmi: default not-GPIO
<PAD_DM_P2 PINMUX_FOR_USB_MODE MDRV_PUSE_UTMI2_DM >, // utmi: default not-GPIO
<PAD_DP_P2 PINMUX_FOR_USB_MODE MDRV_PUSE_UTMI2_DP >, // utmi: default not-GPIO
//<PAD_HSYNC_OUT >,
//<PAD_VSYNC_OUT >,
<PAD_HDMITX_SCL PINMUX_FOR_DMIC_MODE_2 MDRV_PUSE_DMIC_D1 >,
<PAD_HDMITX_SDA PINMUX_FOR_DMIC_MODE_2 MDRV_PUSE_DMIC_D0 >,
<PAD_HDMITX_HPD PINMUX_FOR_DMIC_MODE_2 MDRV_PUSE_DMIC_CLK >,
<PAD_HSYNC_OUT PINMUX_FOR_IDAC_MODE MDRV_PUSE_IDAC_HSYNC>,
<PAD_VSYNC_OUT PINMUX_FOR_IDAC_MODE MDRV_PUSE_IDAC_VSYNC>;
//<PAD_SATA_GPIO >;
status = "ok"; // ok or disable
//status = "disable";
};
};
};
- 从屏幕的数据手册中获取时序表
- 修改屏参
可以拷贝 JpegPlayer/EK79007_1024x600_MIPI.h，在其基础上修改，修改方法和TTL屏一致：
#include "mi_panel_datatype.h"
#define FLAG_DELAY 0xFE
#define FLAG_END_OF_TABLE 0xFF // END OF REGISTERS MARKER
MI_PANEL_ParamConfig_t stPanelParam =
{
"EK79007_1024x600_60", // const char *m_pPanelName; ///< PanelName
0, //MS_U8 m_bPanelDither :1; ///< PANEL_DITHER, keep the setting
E_MI_PNL_LINK_MIPI_DSI, //MHAL_DISP_ApiPnlLinkType_e m_ePanelLinkType :4; ///< PANEL_LINK
///////////////////////////////////////////////
// Board related setting
///////////////////////////////////////////////
1, //MS_U8 m_bPanelDualPort :1; ///< VOP_21[8], MOD_4A[1], PANEL_DUAL_PORT, refer to m_bPanelDoubleClk
0, //MS_U8 m_bPanelSwapPort :1; ///< MOD_4A[0], PANEL_SWAP_PORT, refer to "LVDS output app note" A/B channel swap
0, //MS_U8 m_bPanelSwapOdd_ML :1; ///< PANEL_SWAP_ODD_ML
0, //MS_U8 m_bPanelSwapEven_ML :1; ///< PANEL_SWAP_EVEN_ML
0, //MS_U8 m_bPanelSwapOdd_RB :1; ///< PANEL_SWAP_ODD_RB
0, //MS_U8 m_bPanelSwapEven_RB :1; ///< PANEL_SWAP_EVEN_RB
0, //MS_U8 m_bPanelSwapLVDS_POL :1; ///< MOD_40[5], PANEL_SWAP_LVDS_POL, for differential P/N swap
0, //MS_U8 m_bPanelSwapLVDS_CH :1; ///< MOD_40[6], PANEL_SWAP_LVDS_CH, for pair swap
0, //MS_U8 m_bPanelPDP10BIT :1; ///< MOD_40[3], PANEL_PDP_10BIT ,for pair swap
1, //MS_U8 m_bPanelLVDS_TI_MODE :1; ///< MOD_40[2], PANEL_LVDS_TI_MODE, refer to "LVDS output app note"
///////////////////////////////////////////////
// For TTL Only
///////////////////////////////////////////////
0, //MS_U8 m_ucPanelDCLKDelay; ///< PANEL_DCLK_DELAY
0, //MS_U8 m_bPanelInvDCLK :1; ///< MOD_4A[4], PANEL_INV_DCLK
0, //MS_U8 m_bPanelInvDE :1; ///< MOD_4A[2], PANEL_INV_DE
0, //MS_U8 m_bPanelInvHSync :1; ///< MOD_4A[12], PANEL_INV_HSYNC
0, //MS_U8 m_bPanelInvVSync :1; ///< MOD_4A[3], PANEL_INV_VSYNC
///////////////////////////////////////////////
// Output driving current setting
///////////////////////////////////////////////
// driving current setting (0x00=4mA, 0x01=6mA, 0x02=8mA, 0x03=12mA)
1, //MS_U8 m_ucPanelDCKLCurrent; ///< define PANEL_DCLK_CURRENT
1, //MS_U8 m_ucPanelDECurrent; ///< define PANEL_DE_CURRENT
1, //MS_U8 m_ucPanelODDDataCurrent; ///< define PANEL_ODD_DATA_CURRENT
1, //MS_U8 m_ucPanelEvenDataCurrent; ///< define PANEL_EVEN_DATA_CURRENT
///////////////////////////////////////////////
// panel on/off timing
///////////////////////////////////////////////
30, //MS_U16 m_wPanelOnTiming1; ///< time between panel & data while turn on power
400, //MS_U16 m_wPanelOnTiming2; ///< time between data & back light while turn on power
80, //MS_U16 m_wPanelOffTiming1; ///< time between back light & data while turn off power
30, //MS_U16 m_wPanelOffTiming2; ///< time between data & panel while turn off power
///////////////////////////////////////////////
// panel timing spec.
///////////////////////////////////////////////
// sync related
2, //MS_U8 m_ucPanelHSyncWidth; ///< VOP_01[7:0], PANEL_HSYNC_WIDTH
63, //MS_U8 m_ucPanelHSyncBackPorch; ///< PANEL_HSYNC_BACK_PORCH, no register setting, provide value for query only
///< not support Manuel VSync Start/End now
///< VOP_02[10:0] VSync start = Vtt - VBackPorch - VSyncWidth
///< VOP_03[10:0] VSync end = Vtt - VBackPorch
1, //MS_U8 m_ucPanelVSyncWidth; ///< define PANEL_VSYNC_WIDTH
23, //MS_U8 m_ucPanelVBackPorch; ///< define PANEL_VSYNC_BACK_PORCH
// DE related
65, //MS_U16 m_wPanelHStart; ///< VOP_04[11:0], PANEL_HSTART, DE H Start (PANEL_HSYNC_WIDTH + PANEL_HSYNC_BACK_PORCH)
24, //MS_U16 m_wPanelVStart; ///< VOP_06[11:0], PANEL_VSTART, DE V Start
1024, //MS_U16 m_wPanelWidth; ///< PANEL_WIDTH, DE width (VOP_05[11:0] = HEnd = HStart + Width - 1)
600, //MS_U16 m_wPanelHeight; ///< PANEL_HEIGHT, DE height (VOP_07[11:0], = Vend = VStart + Height - 1)
// DClk related
0, //MS_U16 m_wPanelMaxHTotal; ///< PANEL_MAX_HTOTAL. Reserved for future using.
1102, //MS_U16 m_wPanelHTotal; ///< VOP_0C[11:0], PANEL_HTOTAL
0, //MS_U16 m_wPanelMinHTotal; ///< PANEL_MIN_HTOTAL. Reserved for future using.
0, //MS_U16 m_wPanelMaxVTotal; ///< PANEL_MAX_VTOTAL. Reserved for future using.
636, //MS_U16 m_wPanelVTotal; ///< VOP_0D[11:0], PANEL_VTOTAL
0, //MS_U16 m_wPanelMinVTotal; ///< PANEL_MIN_VTOTAL. Reserved for future using.
0, //MS_U8 m_dwPanelMaxDCLK; ///< PANEL_MAX_DCLK. Reserved for future using.
42, //MS_U8 m_dwPanelDCLK; ///< LPLL_0F[23:0], PANEL_DCLK ,{0x3100_10[7:0], 0x3100_0F[15:0]}
0, //MS_U8 m_dwPanelMinDCLK; ///< PANEL_MIN_DCLK. Reserved for future using.
///< spread spectrum
0, //MS_U16 m_wSpreadSpectrumStep; ///< move to board define, no use now.
0, //MS_U16 m_wSpreadSpectrumSpan; ///< move to board define, no use now.
0, //MS_U8 m_ucDimmingCtl; ///< Initial Dimming Value
0, //MS_U8 m_ucMaxPWMVal; ///< Max Dimming Value
0, //MS_U8 m_ucMinPWMVal; ///< Min Dimming Value
0, //MS_U8 m_bPanelDeinterMode :1; ///< define PANEL_DEINTER_MODE, no use now
E_MI_PNL_ASPECT_RATIO_WIDE, //MHAL_DISP_PnlAspectRatio_e m_ucPanelAspectRatio; ///< Panel Aspect Ratio, provide information to upper layer application for aspect ratio setting.
/*
*
* Board related params
*
* If a board ( like BD_MST064C_D01A_S ) swap LVDS TX polarity
* : This polarity swap value =
* (LVDS_PN_SWAP_H<<8) | LVDS_PN_SWAP_L from board define,
* Otherwise
* : The value shall set to 0.
*/
0, //MS_U16 m_u16LVDSTxSwapValue;
E_MI_PNL_TI_8BIT_MODE, //MHAL_DISP_ApiPnlTiBitMode_e m_ucTiBitMode; ///< MOD_4B[1:0], refer to "LVDS output app note"
E_MI_PNL_OUTPUT_8BIT_MODE, //MHAL_DISP_ApiPnlOutPutFormatBitMode_e m_ucOutputFormatBitMode;
0, //MS_U8 m_bPanelSwapOdd_RG :1; ///< define PANEL_SWAP_ODD_RG
0, //MS_U8 m_bPanelSwapEven_RG :1; ///< define PANEL_SWAP_EVEN_RG
0, //MS_U8 m_bPanelSwapOdd_GB :1; ///< define PANEL_SWAP_ODD_GB
0, //MS_U8 m_bPanelSwapEven_GB :1; ///< define PANEL_SWAP_EVEN_GB
/**
* Others
*/
1, //MS_U8 m_bPanelDoubleClk :1; ///< LPLL_03[7], define Double Clock ,LVDS dual mode
0x001c848e, //MS_U32 m_dwPanelMaxSET; ///< define PANEL_MAX_SET
0x0018eb59, //MS_U32 m_dwPanelMinSET; ///< define PANEL_MIN_SET
E_MI_PNL_CHG_VTOTAL, //MHAL_DISP_ApiPnlOutTimingMode_e m_ucOutTimingMode; ///<Define which panel output timing change mode is used to change VFreq for same panel
0, //MS_U8 m_bPanelNoiseDith :1; ///< PAFRC mixed with noise dither disable
(MI_PANEL_ChannelSwapType_e)2,
(MI_PANEL_ChannelSwapType_e)4,
(MI_PANEL_ChannelSwapType_e)3,
(MI_PANEL_ChannelSwapType_e)1,
(MI_PANEL_ChannelSwapType_e)0,
};
MI_U8 EK79007_INIT_CMD[] =
{
//NA
};
MI_PANEL_MipiDsiConfig_t stMipiDsiConfig =
{
//HsTrail HsPrpr HsZero ClkHsPrpr ClkHsExit ClkTrail ClkZero ClkHsPost DaHsExit ContDet
5, 3, 5, 10, 14, 3, 12, 10, 5, 0,
//Lpx TaGet TaSure TaGo
16, 26, 24, 50,
//Hac, Hpw, Hbp, Hfp, Vac, Vpw, Vbp, Vfp, Bllp, Fps
1024, 5, 50, 23, 600, 1, 23, 12, 0, 60,
E_MI_PNL_MIPI_DSI_LANE_4, // MIPnlMipiDsiLaneMode_e enLaneNum;
E_MI_PNL_MIPI_DSI_RGB888, // MIPnlMipiDsiFormat_e enFormat;
E_MI_PNL_MIPI_DSI_SYNC_PULSE, // MIPnlMipiDsiCtrlMode_e enCtrl;
EK79007_INIT_CMD,
sizeof(EK79007_INIT_CMD),
1, 0x01AF, 0x01B9, 0x80D2, 7,
2,2,2,2,2,
};
- 修改ChannelSwap的值：
(MI_PANEL_ChannelSwapType_e)2, (MI_PANEL_ChannelSwapType_e)4, (MI_PANEL_ChannelSwapType_e)3, (MI_PANEL_ChannelSwapType_e)1, (MI_PANEL_ChannelSwapType_e)0,
默认的PAD引脚和MIPI对应功能如下：
如果实际电路连接不一致，则需要修改ChannelSwap的值：
修改的规则如下:
首先对PAD和lane进行分组
并清楚eCh0-4所代表的意义
这里举一个实例，D0-D3分别对接屏的D0-D3，CK对接屏的CK,因此得出下表:
- 根据屏厂提供的初始化代码，修改初始化数组：
修改stMipiDsiConfig的值：
MI_PANEL_MipiDsiConfig_t stMipiDsiConfig = { //HsTrail HsPrpr HsZero ClkHsPrpr ClkHsExit ClkTrail ClkZero ClkHsPost DaHsExit ContDet 5, 3, 5, 10, 14, 3, 12, 10, 5, 0, //Lpx TaGet TaSure TaGo 16, 26, 24, 50, //Hac, Hpw, Hbp, Hfp, Vac, Vpw, Vbp, Vfp, Bllp, Fps 1024, 5, 50, 23, 600, 1, 23, 12, 0, 60, E_MI_PNL_MIPI_DSI_LANE_4, // MIPnlMipiDsiLaneMode_e enLaneNum; E_MI_PNL_MIPI_DSI_RGB888, // MIPnlMipiDsiFormat_e enFormat; E_MI_PNL_MIPI_DSI_SYNC_PULSE, // MIPnlMipiDsiCtrlMode_e enCtrl; EK79007_INIT_CMD, sizeof(EK79007_INIT_CMD), 1, 0x01AF, 0x01B9, 0x80D2, 7, 2,2,2,2,2, };
文档更新时间: 2020-12-16 14:43 作者：Aeeditor
